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? semiconductor components industries, llc, 2006 july, 2006 ? rev. 8 1 publication order number: mc33761/d mc33761 ultra low?noise low dropout voltage regulator with 1.0 v on/off control the mc33761 is an low dropout (ldo) regulator featuring excellent noise performances. thanks to its innovative design, the circuit reaches an impressive 40 vrms noise level without an external bypass capacitor. housed in a small sot?23 5 leads?like package, it represents the ideal designer?s choice when space and noise are at premium. the absence of external bandgap capacitor accelerates the response time to a wake?up signal and keeps it within 40 s (in repetitive mode), making the mc33761 as a natural candidate for portable applications. the mc33761 also hosts a novel architecture which prevents excessive undershoots in the presence of fast transient bursts, as in any bursting systems. finally, with a static line regulation better than ?75 db, it naturally shields the downstream electronics against choppy lines. features ? ultra?low noise: 150 nv/ hz @ 100 hz, 40 vrms 100 hz?100 khz typical, i out = 60 ma, co = 1.0 f ? fast response time from off to on: 40 s typical at a 200 hz repetition rate ? ready for 1.0 v platforms: on with a 900 mv high level ? nominal output current of 80 ma with a 100 ma peak capability ? typical dropout of 90 mv @ 30 ma, 160 mv @ 80 ma ? ripple rejection: 70 db @ 1.0 khz ? 1.5% output precision @ 25 c ? thermal shutdown ? v out available at 2.5 v, 2.8 v, 2.9 v, 3.0 v, 5.0 v ? operating range from ?40 to +85 c ? dual version is available as mc33762 ? pb?free packages are available applications ? noise sensitive circuits: vcos rf stages, etc. ? bursting systems (tdma phones) ? all battery operated devices figure 1. simplified block diagram thermal shutdown on/off band gap reference *current limit *antisaturation protection *load transient improvement v out v in gnd nc on/ off 5 1 2 4 3 thin sot?23?5 sn suffix case 483 1 5 pin connections and marking diagram 1 3 nc v in 2 gnd on/off 4 v out 5 see detailed ordering and shipping information in the package dimensions section on page 12 of this data sheet. ordering information (top view) http://onsemi.com lxxayw lxx = device code a = assembly location y = year w = work week = pb?free package (note: microdot may be in either location)
mc33761 http://onsemi.com 2 pin function descriptions pin # pin name function description 1 v in powers the ic a positive voltage up to 12 v can be applied upon this pin. 2 gnd the ic?s ground 3 on/off shuts or wakes?up the ic a 900 mv level on this pin is sufficient to start the ic. a 150 mv shuts it down. 4 nc none it makes no arm to connect the pin to a known potential, like in a pin?to?pin replacement case. 5 v out delivers the output voltage this pin requires a 1.0 f output capacitor to be stable. maximum ratings rating pin # symbol value unit min max power supply voltage 1 v in ? 12 v esd capability, hbm model all pins ? ? 1.0 kv esd capability, machine model all pins ? ? 200 v maximum power dissipation nw suffix, plastic package thermal resistance junction?to?air ? p d r ja ? ? internally limited 210 w c/w operating ambient temperature maximum junction temperature (note 1) maximum operating junction temperature (note 2) ? t a t jmax t j ? ? ? ?40 to +85 150 125 c c c storage temperature range ? t stg ? ?60 to +150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. electrical characteristics (for typical values t a = 25 c, for min/max values t a = ?40 c to +85 c, max t j = 125 c unless otherwise noted) characteristics pin # symbol min typ max unit logic control specifications input voltage range 3 v on/off 0 ? v in v on/off input resistance (all versions) 3 r on/off ? 250 ? k on/off control voltages (note 3) logic zero, off state, i o = 50 ma logic one, on state, i o = 50 ma 3 v on/off ? 900 ? ? 150 ? mv currents parameters current consumption in off state (all versions) off mode current: v in = v out + 1.0 v, i o = 0, v off = 150 mv ? iq off ? 0.1 2.0 a current consumption in on state (all versions) on mode current: v in = v out + 1.0 v, i o = 0, v on = 3.5 v ? iq on ? 180 ? a current consumption in on state (all versions), on mode saturation current: v in = v out ? 0.5 v, no output load ? iq sat ? 800 ? a current limit v in = vout nom + 1.0 v, output is brought to vout nom ? 0.3 v (all versions) ? i max 100 180 500 ma 1. internally limited by shutdown. 2. specifications are guaranteed below this value. 3. voltage slope should be greater than 2.0 mv/ s.
mc33761 http://onsemi.com 3 electrical characteristics (continued) (for typical values t a = 25 c, for min/max values t a = ?40 c to +85 c, max t j = 125 c unless otherwise noted) characteristics pin # symbol min typ max unit output voltages v out + 1.0 v < v in < 6.0 v, t a = 25 c, 1.0 ma < i out < 80 ma 2.5 v 5 v out 2.462 2.5 2.537 v 2.8 v 5 v out 2.758 2.8 2.842 v 2.9 v 5 v out 2.857 2.9 2.943 v 3.0 v 5 v out 2.955 3.0 3.045 v 5.0 v 5 v out 4.925 5.0 5.075 v other voltages up to 5.0 v available in 50 mv increment steps 5 v out ?1.5 x +1.5 % v out + 1.0 v < v in < 6.0 v, t a = ?40 c to +85 c, 1.0 ma < i out < 80 ma 2.5 v 5 v out 2.425 2.5 2.575 v 2.8 v 5 v out 2.716 2.8 2.884 v 2.9 v 5 v out 2.813 2.9 2.987 3.0 v 5 v out 2.91 3.0 3.090 v 5.0 v 5 v out 4.850 5.0 5.150 v other voltages up to 5.0 v available in 50 mv increment steps 5 v out ?3.0 x +3.0 % line and load regulation, dropout voltages line regulation (all versions) v out + 1.0 v < v in < 12 v, i out = 80 ma 5/1 reg line ? ? 20 mv load regulation (all versions) v in = v out + 1.0 v, c out = 1.0 f, i out = 1.0 to 80 ma 5 reg load ? ? 40 mv dropout voltage (all versions) (note 4) i out = 30 ma i out = 60 ma i out = 80 ma 5 5 5 v in ?v out v in ?v out v in ?v out ? ? ? 90 140 160 150 200 250 mv dynamic parameters ripple rejection (all versions) v in = v out + 1.0 v + 1.0 khz 100 mvpp sinusoidal signal 5/1 ripple ? ?70 ? db output noise density @ 1.0 khz 5 ? ? 150 ? nv/ hz rms output noise voltage (all versions) c out = 1.0 f, i out = 50 ma, f = 100 hz to 1.0 mhz 5 noise ? 35 ? v output rise time (all versions) c out = 1.0 f, i out = 50 ma, 10% of rising on signal to 90% of nominal v out 5 t rise ? 40 ? s thermal shutdown thermal shutdown (all versions) ? ? ? ? 125 c 4. v out is brought to v out ? 100 mv.
mc33761 http://onsemi.com 4 definitions load regulation the change in output voltage for a change in output current at a constant chip temperature. dropout voltage the input/output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. measured when the output drops 100 mv below its nominal value (which is measured at 1.0 v differential value). the dropout level is affected by the chip temperature, load current and minimum input supply requirements. output noise voltage this is the integrated value of the output noise over a specified frequency range. input voltage and output current are kept constant during the measurement. results are expressed in vrms. maximum power dissipation the maximum total dissipation for which the regulator will operate within its specs. quiescent current the quiescent current is the current which flows through the ground when the ldo operates without a load on its output: internal ic operation, bias etc. when the ldo becomes loaded, this term is called the ground current. it is actually the difference between the input current (measured through the ldo input pin) and the output current. line regulation the change in output voltage for a change in input voltage. the measurement is made under conditions of low dissipation or by using pulse technique such that the average chip temperature is not significantly affected. one usually distinguishes static line regulation or dc line regulation (a dc step in the input voltage generates a corresponding step in the output voltage) from ripple rejection or audio susceptibility where the input is combined with a frequency generator to sweep from a few hertz up to a defined boundary while the output amplitude is monitored. thermal protection internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. when activated at typically 125 c, the regulator turns off. this feature is provided to prevent catastrophic failures from accidental overheating. maximum package power dissipation the maximum power package power dissipation is the power dissipation level at which the junction temperature reaches its maximum operating value, i.e. 125 c. depending on the ambient temperature, it is possible to calculate the maximum power dissipation and thus the maximum available output current.
mc33761 http://onsemi.com 5 characterization curves all curves taken with v in = v out + 1.0 v, v out = 2.8 v, c out = 1.0 f 25 c ?40 c 25 c 85 c figure 2. ground current versus output current figure 3. quiescent current versus temperature figure 4. dropout versus output current figure 5. output voltage versus output current output current (ma) 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 100 80 60 0 ground current (ma) ambient temperature ( c) 100 80 60 40 20 0 ?20 ?40 ?60 180 175 170 quiescent current ( a) 165 0.5 0 185 40 20 output current (ma) 200 150 100 50 100 80 60 0 dropout (mv) output current (ma) 100 80 60 40 20 0 2.800 2.795 2.790 output voltage (v) 2.775 0 2.805 40 20 2.785 2.780 figure 6. dropout versus temperature temperature ( c) 180 160 120 100 60 40 100 80 60 ?60 dropout voltage (mv) 20 0 0 ?20 80 140 ?40 40 20 ?40 c 25 c 85 c ?40 c 85 c 40 c ?20 c 0 c 1.0 ma 30 ma 60 ma 80 ma
mc33761 http://onsemi.com 6 application hints input decoupling as with any regulator, it is necessary to reduce the dynamic impedance of the supply rail that feeds the component. a 1.0 f capacitor either ceramic or tantalum is recommended and should be connected close to the mc33761 package. higher values will correspondingly improve the overall line transient response. output decoupling thanks to a novel concept, the mc33761 is a stable component and does not require any specific equivalent series resistance (esr) neither a minimum output current. capacitors exhibiting esrs ranging from a few m up to 3.0 can thus safely be used. the minimum decoupling value is 1.0 f and can be augmented to fulfill stringent load transient requirements. the regulator accepts ceramic chip capacitors as well as tantalum devices. noise decoupling unlike other ldos, the mc33761 is a true low?noise regulator. w ithout the need of an external bypass capacitor, it typically reaches the incredible level of 40 vrms overall noise between 100 hz and 100 khz. to give maximum insight on noise specifications, on semiconductor includes spectral density graphics. the classical bypass capacitor impacts the start?up phase of standard ldos. however, thanks to its low?noise architecture, the mc33761 operates without a bypass element and thus offers a typical 40 s start?up phase. protections the mc33761 hosts several protections, giving natural ruggedness and reliability to the products implementing the component. the output current is internally limited to a maximum value of 180 ma typical while temperature shutdown occurs if the die heats up beyond 125 c. these values let you assess the maximum differential voltage the device can sustain at a given output current before its protections come into play. the maximum dissipation the package can handle is given by: p max t jmax t a r ja if t jmax is limited to 125 c, then the mc33761 can dissipate up to 470 mw @ 25 c. the power dissipated by the mc33761 can be calculated from the following formula: ptot v in i gnd (i out ) v in v out i out or vin max ptot v out i out i gnd i out if a 80 ma output current is needed, the ground current is extracted from the data?sheet curves: 4.0 ma @ 80 ma. for a mc33761snt1?28 (2.8 v) delivering 80 ma and operating at 25 c, the maximum input voltage will then be 8.3 v. typical applications the following picture portrays the typical application of the mc33761.
mc33761 http://onsemi.com 7 figure 7. a typical application schematic 1 3 2 4 5 mc33761 r1 100 k on/off + c3 1 f + c2 1.0 f dropout charge output permanently enables the ic when closed input as for any low noise designs, particular care has to be taken when tackling printed circuit board (pcb) layout. the figure below gives an example of a layout where stray inductances/capacitances are minimized. this layout is the basis for the mc33761 performance evaluation board. the bnc connectors give the user an easy and quick evaluation mean.
mc33761 http://onsemi.com 8 understanding the load transient improvement the mc33761 features a novel architecture which allows the user to easily implement the regulator in burst systems where the time between two current shots is kept very small. the quality of the transient response time is related to many parameters, among which the closed?loop bandwidth with the corresponding phase margin plays an important role. however, other characteristics also come into play like the series pass transistor saturation. when a current perturbation suddenly appears on the output, e.g. a load increase, the error amplifier reacts and actively biases the pnp transistor. during this reaction time, the ldo is in open?loop and the output impedance is rather high. as a result, the voltage brutally drops until the error amplifier effectively closes the loop and corrects the output error. when the load disappears, the opposite phenomenon takes place with a positive overshoot. the problem appears when this overshoot decays down to the ldo steady?state value. during this decreasing phase, the ldo stops the pnp bias and one can consider the ldo asleep (figure 8). if by misfortune a current shot appears, the reaction time is incredibly lengthened and a strong undershoot takes place. this reaction is clearly not acceptable for line sensitive devices, such as vcos or other radio?frequency parts. this problem is dramatically exacerbated when the output current drops to zero rather than a few ma. in this later case, the internal feedback network is the only discharge path, accordingly lengthening the output voltage decay period (figure 9). the mc33761 cures this problem by implementing a clever design where the ldo detects the presence of the overshoot and forces the system to go back to steady?state as soon as possible, ready for the next shot. figure 10 and 11 show how it positively improves the response time and decreases the negative peak voltage. figure 8. a standard ldo behavior when the load current disappears figure 9. a standard ldo behavior when the load current appears in the decay zone figure 10. without load transient improvement figure 11. mc33761 with load transient improvement
mc33761 http://onsemi.com 9 mc33761 has a fast start?up phase thanks to the lack of bypass capacitor the mc33761 is able to supply its downstream circuitry as soon as the off to on signal appears. in a standard ldo, the charging time of the external bypass capacitor hampers the response time. a simple solution consists in suppressing this bypass element but, unfortunately, the noise rises to an unacceptable level. mc33761 offers the best of both worlds since it no longer includes a bypass capacitor and starts in less than 40 s typically (repetitive at 200 hz). it also ensures a low?noise level of 40 vrms 100 hz?100 khz. the following picture details the typical 33761 start?up phase. figure 12. repetitive start?up waveforms
mc33761 http://onsemi.com 10 typical transient responses figure 13. output is pulsed from 2.0 ma to 80 ma figure 14. discharge effects from 0 to 40 ma figure 15. load transient improvement effect figure 16. load transient improvement effect
mc33761 http://onsemi.com 11 typical transient responses figure 17. mc33761 typical noise density performance figure 18. mc33761 typical ripple rejection performance figure 19. typical output impedance plot c out = 1.0 f, v in = v out + 1.0 f, frequency (hz) 0 ?10 ?20 ?30 ?50 ?60 ?70 ?80 1,000,000 100,000 100 (db) f, frequency (hz) 1,000,000 10,000 1,000 100 2.5 1.0 0.5 z 0 ?90 ?100 3.5 10,000 1,000 f, frequency (hz) 100,000 10,000 1,000 100 150 100 50 nv/sqrt hz 0 250 100,000 1.5 2.0 3.0 (ohms) o i o = 1.0 ma 10 ma 20 ma 80 ma ?40 i o = 50 ma 10 ma 1,000,000 200 i o = 50 ma 10 ma v in = v o + 1.0 v t a = 25 c c out = 1.0 f v in = v out + 1 .0v t a = 25 c c out = 1.0 f rms noise, i o = 10 ma: 20 hz ? 100 khz: 29 v 20 hz ? 1.0 mhz: 31 v rms noise, i o = 50 ma: 20 hz ? 100 khz: 27 v 20 hz ? 1.0 mhz: 30 v
mc33761 http://onsemi.com 12 ordering information device specific marking code voltage output package shipping ? mc33761snt1?025 l25 2.5 v thin sot?23?5 3000 / tape & reel mc33761snt1?025g thin sot?23?5 (pb?free) mc33761snt1?028 l28 2.8 v thin sot?23?5 mc33761snt1?028g thin sot?23?5 (pb?free) mc33761snt1?029 l29 2.9 v thin sot?23?5 mc33761snt1?029g thin sot?23?5 (pb?free) mc33761snt1?030 l30 3.0 v thin sot?23?5 mc33761snt1?030g thin sot?23?5 (pb?free) mc33761snt1?050 l50 5.0 v thin sot?23?5 mc33761snt1?050g thin sot?23?5 (pb?free) ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d
mc33761 http://onsemi.com 13 package dimensions tsop?5 case 483?02 issue f notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. 4. dimensions a and b do not include mold flash, protrusions, or gate burrs. 5. optional construction: an additional trimmed lead is allowed in this location. trimmed lead not to extend more than 0.2 from body. dim min max millimeters a 3.00 bsc b 1.50 bsc c 0.90 1.10 d 0.25 0.50 g 0.95 bsc h 0.01 0.10 j 0.10 0.26 k 0.20 0.60 l 1.25 1.55 m 0 10 s 2.50 3.00 123 54 s a g l b d h c j 0.7 0.028 1.0 0.039 mm inches scale 10:1 0.95 0.037 2.4 0.094 1.9 0.074 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.20 5x c ab t 0.10 2x 2x t 0.20 note 5 t seating plane 0.05 k m detail z detail z on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 mc33761/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.

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